EUP7998.pdf? VLDOIN Input Voltage Range: 1.1V to 3.5V
? VIN Input Voltage Range: 2.375V to 5.5V
? Typically 3×10μF MLCCs stable for DDR
? Fast Load-Transient Response
? ±10mA Buffered Reference (REFOUT)
? Meet DDR, DDR2 JEDEC Specifications.
Supports DDR3 and Low-Power DDR3/DDR4
VTT Applications
? Power-Good Window Comparator
? With Soft Start, UVLO and OCP
? Thermal Shutdown
? Available in 10-Pin 3mm×3mm TDFN and
SOP-8 (EP) packages
? RoHS Compliant and 100% Lead(Pb)-Free
Halogen-Free
? Input Voltage: Supports 2.5-V Rail and 3.3-V Rail
? VLDOIN Voltage Range: 1.1 V to 3.5 V
? Sink and Source Termination Regulator Includes
Droop Compensation
? Requires Minimum Output Capacitance of 20-μF
(Typically 3 × 10-μF MLCCs) for Memory
Termination Applications (DDR)
? PGOOD to Monitor Output Regulation
? EN Input
? REFIN Input Allows for Flexible Input Tracking
Either Directly or Through Resistor Divider
? Remote Sensing (VOSNS)
? ±10-mA Buffered Reference (REFOUT)
? Built-in Soft Start, UVLO, and OCL
? Thermal Shutdown
? Supports DDR, DDR2, DDR3, DDR3L, Low-
Power DDR3, and DDR4 VTT Applications
? 10-Pin VSON Package With Thermal Pad
