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8-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation and 3-State Outputs.
FEATURES

Control Inputs VIH/VIL Levels are

   Referenced toVCCA Voltage

VCC Isolation: If Either VCC Input is at GND,

  All I/O Ports are in the High-Impedance State

IOFF: Supports Partial Power-Down Mode Operation

Fully Configurable Dual-Rail Design Allows

  EachPort to Operate Over the Full 1.2V to 

  5.0VPower-Supply Range

I/Os are 6.0V Tolerant

-40℃ to +125℃ Operating Temperature Range

Available in Green TSSOP-24 and 

  TQFN-5.5×3.5-24LPackages
















PIN CONFIGUTION
優勢替代
SN74LXC8T245 SN74LXC8T245.pdf

No.12714

FEATURES

Fully Configurab1e Dua1-Rail Design A11ows Each

Port to Operate from 1.1 V to 5.5 v

Robust,Glitch-Free Power Supply Sequencing

· Up to 420-Mbps Support for 3.3 v to 5.o v Schmitt-Trigger

   Inputs A11ow for S1ow or Noisy Inputs

I/O's with Integrated Dynamic Pu11-Down Resistors

  He1p Reduce Externa1 Component Count

Contro1 Inputs with Integrated Static Pu11-Down

  Resistors A11ow for F1oating Contro1 Inputs

High Drive Strength (up to 32 mA at 5 v)

Low Power Consumption

  4-u A Maximum (25C)

 12-u A Maximum (-40°C to 125°C)

vcC Iso1ation and Vcc Disconnect(Ioff-f1oat) Feature

  -If Either Vcc Supply is < 100 mv or

  Disconnected, A11 I/O's Get Pu1led-Down

  andThen Become High-Impedance

  Ioff Supports Partial-Power

  Down Mode Operation-

Compatib1e with LVC Family Leve1 Shifters

Contro1 Logic(DIR and OE) are Referenced to vccA

Operating Temperature from -40°C to +125°c

Latch-Up Performance Exceeds 100 mA per JESD

  78,C1ass II

ESD Protection Exceeds JESD 22

  4000-V Human-Body Mode1

  1000-v Charged-Device Mode1

PIN CONFIGUTION
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